"au:"Marcelo Orenes-Vera"" — arXiv2 SearchShowing 1–9 of 9 results
/ Date/ Name
Sep 29, 2022Wafer-Scale Fast Fourier TransformsNov 27, 2023Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction TreesApr 19, 2023Massive Data-Centric Parallelism in the Chiplet EraJul 26, 2022Dalorex: A Data-Local Program Execution and Architecture for Memory-bound ApplicationsDec 15, 2023Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore SystemsApr 8, 2021AutoSVA: Democratizing Formal Verification of RTL Module InteractionsSep 18, 2023Using LLMs to Facilitate Formal Verification of RTLNov 26, 2023DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular ApplicationsApr 16, 2020The MosaicSim Simulator (Full Technical Report)