Implementation of magic state injection within heavy-hexagon architectures

The magic state injection process is a critical component of fault-tolerant quantum computing, and numerous studies have been conducted on this topic. Many existing studies have focused on square-lattice structures, where each qubit connects directly to four other qubits via two-qubit gates. However, hardware that does not follow a lattice structure, such as IBM’s heavy-hexagon structure, is also under development. In these non-lattice structures, many quantum error correction (QEC) codes designed for lattice-based system cannot be directly applied. Adapting these codes often requires incorporating additional qubits, such as flag qubits. This alters the properties of the QEC code and introduces new variables into the magic state injection process. In this study, we implemented and compared the magic state injection process on a heavy-hexagon structure with flag qubits and a lattice structure without flag qubits. Additionally, we considered biased errors in superconducting hardware and investigated the impact of flag qubits under these conditions. Our analysis reveals that the inclusion of flag qubits introduces distinct characteristics into the magic state injection process, which are absent in systems without flag qubits. Based on these findings, we identify several critical considerations for performing magic state injection on heavy-hexagon systems incorporating flag qubits. Furthermore, we propose an optimized approach to maximize the efficacy of this process in such systems.